1.
Japanese Patent Office examination guideline for inventions using microcomputers / David S. Guttman.
Guttman, David S., author.
[Place of publication not identified] : [publisher not identified], 1983.
English | 20 JP |
Detailed record - Similar records
2.
Protection of the circuit layout of semiconductor integrated circuits in Japan / Zentaro Kitagawa.
Kitagawa, Zentaro, author.
Geneva [Switzerland] : International Bureau for the Protection of Industrial Property, 1986.
English | 10B OMPI |
Detailed record - Similar records